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Synopsys Launches OpenVera Catalyst Program
MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Sept. 25, 2001--Synopsys,
Inc. (Nasdaq:SNPS), the technology leader for complex integrated
circuit (IC) design, today launched the OpenVera(TM) Catalyst Program,
with 20 design and verification service companies participating. The
OpenVera Catalyst Program creates a broad network of verification
companies with expert tool and methodology knowledge in leading
verification solutions such as the VERA® testbench tool, VCS
Verilog(TM) simulator and Scirocco(TM) VHDL simulator. The OpenVera
Catalyst Program complements Synopsys® Professional Services'
existing design and verification offerings by expanding the support
and services options available to customers for meeting their
system-on-chip (SoC) verification challenges. Participating members of
the Catalyst Program will create and commercialize OpenVera
verification intellectual property (IP) to accelerate the development
of complete verification suites. OpenVera verification IP typically
consists of verification modules such as bus functional models,
traffic generators and protocol checkers for widely used protocols.
``With the growing momentum around OpenVera, many third party
service companies have expressed interest in developing IP and
services around this open language. We're very excited to announce the
OpenVera Catalyst Program and look forward to working with current and
future members to increase support for mutual customers,'' said Jim
Watts, OpenVera program manager at Synopsys. ``Our joint customers will
benefit by having access to a broader range of OpenVera verification
IP and networks of experts trained on leading verification
technologies to enhance their verification productivity.''
The initial OpenVera Catalyst Program members are: Aurora VLSI,
Azure Software, ControlNet India, CMOSchips, eInfochips, GDA
Technologies, HCL Technologies, Inspiration Technologies, Interra
Technologies, Intrinsix, nSys, Paradigm Works, PicoCraft, SmartSand,
Qualis Design, Silicon Interfaces, Spike Technologies, Willamette HDL,
Wipro Technologies and Zaiq Technologies.
``Customers are clamoring for proven verification methodologies and
tools to ensure that their designs are done right the first time,''
said Janick Bergeron, chief technology officer at Qualis Design, a
leading verification IP and methodology consulting firm. ``Through the
OpenVera Catalyst Program, we will address our customers' challenges
by providing expert services on VERA methodology and by offering high
quality, reusable OpenVera verification IP.''
``We are happy to provide our customers with OpenVera expertise and
IP for state-of-the-art verification technology,'' said Ravi
Thummarukudy, vice president of IC design services at GDA
Technologies, a leading design services company. ``We are witnessing a
growing demand for OpenVera support and are looking forward to
developing ready-made verification solutions to help customers get up
and running with complex testbench solutions in days instead of weeks
or months.''
``We welcome the opportunity to join the OpenVera Catalyst Program
and apply Zaiq's recognized leadership in system level verification
and verification IP to the OpenVera language and tools,'' said Jim
Pena, vice president of sales and marketing at Zaiq Technologies. ``The
OpenVera Catalyst Program is an ideal way for us to help our mutual
customers to enhance their verification productivity and meet critical
product development objectives.''
About OpenVera Catalyst Program
The OpenVera Catalyst Program is open to design service companies
that offer services in verification of complex ICs. Catalyst Program
members will get access to licenses for VERA, VCSi and Scirocco to
create OpenVera verification IP and make it available to a rapidly
growing market base of OpenVera users. Through the OpenVera Catalyst
Program, customers verifying complex ICs and systems-on-chip (SoCs)
are assured of fully trained and supported verification service
companies that will apply Synopsys' proven verification technology in
the verification flow of their complex designs. OpenVera is an open
source hardware verification language developed specifically to meet
the unique requirements of functional verification. The language
enables users to describe the target application environment,
including complex protocols and data objects, at a high level of
abstraction, which dramatically increases productivity, readability
and reusability. For more information on OpenVera, visit
www.open-vera.com.
About Synopsys Professional Services
Synopsys Professional Services directly contributes to the success
of leading electronics firms worldwide by delivering the technology,
methodology and expertise to solve their most demanding SoC
development challenges. Synopsys' comprehensive portfolio of services
covers all critical phases of the SoC development process, as well as
systems development in wireless and broadband applications. Leading
edge development demands close collaboration, and customers are
offered a variety of engagement models from methodology-driven project
assistance to full turnkey development to best fit their business and
project needs.
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS), headquartered in Mountain View,
California, creates leading electronic design automation (EDA) tools
for the global electronics market. The company delivers advanced
design technologies and solutions to developers of complex integrated
circuits, electronic systems and systems on a chip. Synopsys also
provides consulting and support services to simplify the overall IC
design process and accelerate time to market for its customers. Visit
Synopsys at http://www.synopsys.com.
Synopsys is a registered trademark of Synopsys, Inc. All other
trademarks or registered trademarks mentioned in this release are the
intellectual property of their respective owners.
Contact:
Synopsys, Inc.
Isela Gamboa, 650/584-1644
igamboa@synopsys.com
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